Controlled impedance, the short version 

A practical guide to the stackups, traces and numbers that decide whether a high-speed lane works on the first try. Skip the theory if you already know it. The numbers below are the ones we actually ship.

Start with the stackup.

A controlled impedance design starts with the stackup. Pick the dielectric, pick the copper, then design the traces. Doing it the other way around is the most common mistake in high-speed layout.

• Reference plane directly under every high-speed layer.
• Symmetric copper distribution to prevent bow.
• Glass weave style chosen for the bit rate, not the price.

Trace geometry, in numbers.

Single ended traces are calculated against a single reference plane. Differential pairs are calculated together. The values below are the ones we ship on most of our eight-layer designs.

Single ended 50 ohm: 4.5 mil trace width, 3.6 mil to reference, dielectric Er 3.9. Differential 100 ohm: 4.0 mil width, 5.0 mil pair spacing, 3.6 mil to reference.

A high-speed signal goes nowhere without its return. Every plane split is a question waiting to be asked at the EMC chamber.

Mind the return path.

Every via that crosses a plane needs a stitching via near it. Every plane split is a question waiting to be asked at the EMC chamber. Plan the return path before you plan the signal.

The stackup we ship.

• Layers: 8.
• Finished thickness: 1.6 mm.
• Copper weight: 1 oz outer, 0.5 oz inner.
• Dielectric: Megtron 6.
• Min trace and space: 4 mil and 4 mil.
• Class: IPC 6012 Class 3.

These numbers are not magic. They are simply the ones we have proven, across many programs, to give a first-pass yield we are willing to defend. Your numbers may be different. Just make sure they are written down before the first trace is drawn.